Ladder diagram, better known as ladder logic, is a programming language used to program PLCs (programmable logic controllers). This article will briefly describe what ladder logic is and go over some examples of how it works.
Programmable logic controllers or PLCs are digital computers that are used to perform control functions, usually for industrial applications. Of the various languages that can be used to program a PLC, ladder logic is the only one modeled directly after electromechanical relay systems.
It uses long steps arranged between two vertical bars that represent the power of the system. Along the rungs are contacts and coils, modeled after the contacts and coils found in mechanical relays. The contacts act as inputs and often represent switches or pushbuttons; The coils behave like outputs, like a light or a motor.
However, the outputs do not have to be physical and can represent a single bit in the PLC memory. This bit can be used later in the code as another input. Contacts are placed in series to represent AND logic and in parallel when OR logic is used. As with real relays, there are normally open contacts and normally closed contacts.
An example of ladder logic
Let’s look at an example of ladder logic programming:
Figure 1. A simple ladder logic program.
This ladder logic program is three long rungs. The program is “scanned” or executed by the CPU from left to right and top to bottom. The symbols placed along the steps are actually graphic instructions. The names of these instructions are:
- XIC (check if closed)
- XIO (check if open)
- OTE (Energize Output).
Looking at the first rung, notice the first two inputs I: 1/1 and I: 1/2. The symbol is an XIC, and the I denotes that it is an input. This instruction represents a physical input found on one of the discrete input cards.
Figure 2. The first rung represents a physical input found on one of the discrete input cards.
I: 1 means that this input card has been placed in slot 1, directly adjacent to the processor. The / 1 indicates the bit of interest. Input cards have more than one channel, and if the instruction specifies / 1, the instruction accesses channel 1.
The second entry represents channel 2 on the same card. An XIC instruction actually means true if it is closed. That is, this statement will be true if the input device it represents is closed. If an instruction is true, it is highlighted in green. The only way to energize an output is if a true instruction path can be traced from the left rail to the right rail. Therefore, the output on rung one will be true because there is a true instruction path, I: 1/1 and I: 1/2. This is effectively an AND operation.
The output in this case, B: 0/1, is actually an internal bit stored in the PLC memory. That is why it is labeled B instead of O for “output.” These internal bits work well when you need to record a certain state or set of inputs without actually activating a physical output.
In the second row, we have a third input labeled I: 1/3 and our inner bit is now used with an input instruction instead of an output.
Figure 3. The second rung represents a third input used with an input instruction.
These two inputs are placed in parallel and represent an OR condition. O: 2/1 is an output instruction representing channel 1 on a discrete physical output card placed in slot 2. This second rung could be rewritten without the internal bit by replacing B: 0/1 with the two rung inputs one. Therefore, the output O: 2/1 will be true if I: 1/3 is true OR if both I: 1/1 and EI: 1/2 are true. This is the basic structure of all ladder logic programs.
The third rung introduces the XIO instruction. An XIO instruction is best described as true if it is open.
Figure 4. The third rung introduces the XIO instruction.
The XIO will be true only if the input connected to it is open. For internal bits, this instruction is true if the internal bit is off. Therefore, since I: 1/1 and I: 1/2 are closed, the XIO instructions that represent those inputs are false. The XIO representing I: 1/3 is true because the input device it represents is open. Without a true instruction path from left to right, the output on rung three, O: 2/2, is off.
PLC system instructions
The instructions explained above are the most fundamental instructions in PLC systems, but they represent a small part of the entire instruction set. Most PLCs include timer, counter, latch, and advanced logic instructions.
Figure 5 shows a slightly more complicated level control program written by the author for an Allen-Bradley PLC.
Figure 5. Level control program
For starters, you may notice the I: 1/0 input. Confusingly, Allen-Bradley names the first channel on any card channel 0. This is similar to how array indices start at zero.
This program uses two level switches, connected to a tank, to activate two pumps that should start running one after the other rather than simultaneously. Note that the same two XIC inputs control pump A and B. However, an internal drill is used with an XIC to control pump A and with an XIO to control pump B. If line 0000 is true, the Pump A is blocked by a close instruction.
If row 0001 is true, pump B hangs. Once a hold instruction goes true, the output remains on until a supplemental unlock instruction is activated. The last rung controls the pump lever, using a one-shot and XOR instruction.
The one-shot, when activated, remains true for a single scan program, while the XOR behaves as usual. This is an easy way to switch around a bit with a single entry.
The instructions used here are only a fraction of what is available. Ladder logic can be used to build state machines, manipulate analog values, and even perform PID control.
For a more in-depth look at ladder logic, see AAC Textbook Volume IV, Chapter 6, devoted to the history of ladder logic, digital logic functions, and ladder logic applications.